instruction execution

英 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

美 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

网络  指令执行

计算机

英英释义

noun

• (computer science) the process of carrying out an instruction by a computer
  Synonym:execution

双语例句

• When complete, the original instruction is executed ( from the breakpoint), and execution continues at that point.
  执行完成之后，接着执行原始的指令（从断点开始）。
• The article essentially describes such points as instruction execution and memory management in constructing a virtual running embedded system.
  文中着重介绍了构建嵌入式虚拟运行平台中的指令执行、存储器管理等核心技术问题。
• In the traditional Cache, the Cache hit ratio is insured only by the address locality of memory reference instruction stream during program execution, it restricts the improvement of Cache hit ratio.
  在传统的Cache中，仅仅依靠程序执行时访存指令流地址的局域性来保证较高的Cache命中率，使得Cache命中率的提高受到限制。
• Activity is a unit of instruction execution, and is the building block of a process.
  活动（activity）是指令执行的一个单元，它是一个流程的基本组成部分。
• Characteristics of the microprocessor are fast speed and nimble instructions. The way of raising speed is to adopt pipelining in instruction execution.
  它的运算速度提高的途径是指令的执行采用流水线方式，指令缓冲部件IB采用两个体交替接收指令和执行指令的办法来减少取指令的等待时间。
• In the instruction execution pipeline stage, scalable pipeline technology was adopted to realize the video processing instruction.
  为有效实现扩展指令，处理器执行级采用了可扩展流水级技术。
• A technique whereby the receiver fetches the next instruction before completing execution of the previous instruction, in order to increase processing speed.
  在前一条指令全部执行完之前就开始取下一条指令，以提高处理速度的一种技术。
• This paper has discussed the relationship between the machine cycle and instruction execution time for superscalar RISC architecture, issuing multiple instructions in one machine cycle. Several new design features of superscalar RISC architecture with single execution unit and multiple function units have been analysed.
  本文讨论超标量RISC结构中单周期发多条指令中周期和执行指令时间的相对关系，并分析了新型超标量RISC结构的实现方案，其中包括具有单个执行部件和多个执行部件的结构。
• Static instruction scheduling decides the execution order of instructions and improves the instruction-level parallelism by reducing stall caused by dependences.
  静态指令调度决定指令执行顺序，屏蔽指令间由于依赖关系而产生的延迟，从而提高了指令的并行度。
• Traditional programming model like C, C++ and Fortran are poorly suited to multi-core architectures because of the assumed single instruction stream execution model and centralized memory structure.
  C、C++和Fortran等基于单指令流和统一存储结构的传统编程模型已经无法适应多核处理器结构。